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IRS26310DJPbF
Fault Reporting and Programmable Fault Clear Timer
The IRS26310D family provides an integrated fault reporting output and an adjustable fault clear timer. There are two
situations that would cause the HVIC to report a fault via the FAULT pin. The first is an undervoltage condition of V CC
and the second is if the ITRIP pin recognizes a fault. Once the fault condition occurs, the FAULT pin is internally
pulled to V SS and the fault clear timer is activated. The fault output stays in the low state until the fault condition has
been removed and the fault clear timer expires; once the fault clear timer expires, the voltage on the FAULT pin will
return to V CC .
The length of the fault clear time period (t FLTCLR ) is determined by exponential charging characteristics of the capacitor
where the time constant is set by R RCIN and C RCIN . In Figure 11 where we see that a fault condition has occurred
(UVLO or ITRIP), RCIN and FAULT are pulled to V SS , and once the fault has been removed, the fault clear timer
begins. Figure 12 shows that R RCIN is connected between the V CC and the RCIN pin, while C RCIN is placed between
the RCIN and V SS pins.
Figure 11: RCIN and FAULT pin waveforms
Figure 12: Programming the fault clear timer
The design guidelines for this network are shown in Table 3.
≤1 nF
C RCIN
Ceramic
0.5 M
to 2 M
R RCIN
>> R ON,RCIN
Table 3: Design guidelines
The length of the fault clear time period can be determined by using the formula below.
v C (t) = V f (1-e
-t/RC
)
t FLTCLR = -(R RCIN C RCIN )ln(1-V RCIN,TH /V CC )
www.irf.com
22
? 2008 International Rectifier
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